[ale] 2 questions memory related

[Greg Clifton]

I've been selling/building PCs for over 20 yrs and I can tell you that
modern memory is way better than it used to be. Not directly related to
Moore's Law but linked to it as a result of improvement in process control
& machinery used in making the RAM. BTW, Apple never used parity RAM in
their PCs (probably do in their servers, esp the Intel based stuff but have
0 experience with those) but IBM PCs did. This was supposedly to increase
accuracy or at least to trap errors. However, it turned out that the biggest
source of RAM errors was from radioactivity in the ceramic that the chips
were packed in. Once plastic/epoxy packaging was developed, RAM errors went
WAY down. These days you never see parity (now know as ECC) RAM except in
servers and it is generally associated with REGISTERED memory in machines
with >24GB of  memory. Both Intel Nehalem family chips (Current generation
Xeons and i3, i5, i7) and AMD 6100 & 4100 series CPUS w/ built in memory
controllers can support either REG (not so much with i3 and i5 and at least
some of the i7) or NON-REG RAM. REG is usually required for installations
over 24GB because of bus loading.

Also, as a rule of thumb, it is OK if your memory can run faster than your
memory clock, but not the reverse. I don't know it for a fact, but suspect
that most modern memory has much wider tolerances than what it is sold as
which is partly responsible for the fact that we rarely see memory errors on
new systems. You are quite right regarding overclocked systems needing
better matched parts, and of course better cooling (think water cooled,
although at a recent vendor showcase the Kingston rep said that the water
cooled memory that they sell is mostly for show and that their modules with
metal fins actually cool better).

The main reason for matching RAM was to have matched modules in each memory
channel back when systems had dual memory channels. Current systems have
either dual, triple or quad channel memory and memory modules should still
be installed in sets of 2, 3, or 4 accordingly. Now in a dual processor
system, you could have different spec RAM on each CPU with no problem since
each CPU has its own memory controller. But as a practical matter in a new
build, that would probably never happen.

One final note, again due to bus loading, when a modern system is loaded
with memory modules, the memory clock automatically slows down to make the
system more reliable.


On Sat, Jun 18, 2011 at 8:33 AM, Scott Castaline <skotchman at gmail.com>wrote:

>
>
> On Fri, Jun 17, 2011 at 1:05 PM, Greg Clifton <gccfof5 at gmail.com> wrote:
>
>> The installing/replacing memory in sets is basically due to older [but not
>> too much older] motherboards ran dual channel RAM [new Intel 2P and some 1P
>> is Triple and AMD is Quad Channel] and you don't want to mix RAM with
>> different specs in the same channel. Also, possibly the manufacturer figures
>> if one module failed it's 'partner' is apt to go soon so just replace both
>> instead of having two trouble tickets to deal with stretched over several
>> weeks.
>
> That part I've got, the pairing, what I had the impression of was when you
> bought like 4 sticks like I had you had to buy all four as a set, not just
> say buy a pair and then add another pair (same exact one as the 1st pair)
> later to add on. It didn't make sense to me unless if you're going to push
> things to the extreme with overclocking and such, then you need "handpicked"
> components, which for some reason I was under the impression that was what
> the mfgs were saying for all cases. It was like when I worked at Harris back
> in the late 70's they had developed a system code named 2C which had it's
> clocking set up to push TTL to it's extreme limit producing ECL speed
> (25nsec windows). All chips for that system had to go through special
> screening for handpicking for the 2C, this was the impression I had got of
> current memory buying practices. I don't want to give the impression that I
> don't understand that you have to buy in at least pairs and that all sticks
> have to have the same specs. I personally would stick to the same make/model
> as what I already have.
>
>>
>> On Fri, Jun 17, 2011 at 12:24 PM, Michael B. Trausch <mike at trausch.us>wrote:
>>
>>> On 6/17/2011 12:11 PM, Scott Castaline wrote:
>>> > Sorry for replying to a reply, but to Mike, htop is showing 16
>>> > incidents of mysql, whereas top is only showing 1. Each incident is
>>> > using 1.0% of memory. I also noticed several incidents of kworker*
>>> > running of which (about 20) I don't remember the %Mem for each.
>>> You're probably seeing all of MySQL's threads in htop. They together
>>> will still be using only 1% of the memory...
>>>
>>> kworker is a kernel thread, which has something to do with ACPI.
>>>
>>>     --- Mike
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>>
>>
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