[ale] why not asm

Vernard Martin vernard at cc.gatech.edu
Thu Dec 20 10:06:37 EST 2001


On Thu, 2001-12-20 at 09:52, John Mills wrote:
> By no means sure with a large amount of code and today's RISC processors.
> Compiler optimization now includes instruction scheduling to take
> advantage of processor pipelining, and that effort only needs to be spent
> once - in building the compiler - rather than each time you set pass data
> and call a different type of subroutine.

Actually, the widespread-ness of RISC processors isn't as true as the
press would have you think. The Pentium 4 architecture's Instruction Set
is just as bloated and non-RISC as it used to be. And as long as its
backwards compatible, it will always be non RISC. Now pretty much every
other processor on the planet is RISC though. This is how the StrongArm
and the DragonBall processors get the speed that they do out of that
hardware.

We've been having some really interesting discussions on ALE later ;)
V
-- 
Vernard Martin (vernard at cc.gatech.edu)
http://www.cc.gatech.edu/~vernard/     
        "Pain heals. Chicks dig scars. But Glory. Glory lasts forever."

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